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SRE (short for "Shift Right then EOR") is a mnemonic for an illegal opcode machine language instruction.

This illegal opcode is a combination of two operations with the same addressing mode: LSR, followed by EOR

Function: {addr} = {addr} / 2, then A = A eor {addr}

Addressing modes[edit | edit source]

Opcode Addressing
in bytes
Number of
Dec Hex
79 4F Absolute SRE nnnn 3 6
95 5F Absolute,X SRE nnnn,X 3 7
91 5B Absolute,Y SRE nnnn,Y 3 7
71 47 Zeropage SRE nn 2 5
87 57 Zeropage,X SRE nn,X 2 6
67 43 Indexed-indirect SRE (nn,X) 2 8
83 53 Indirect-indexed SRE (nn),Y 2 8

SRE supports the 7 different addressing modes shown in the table at right. In the assembler formats listed, nn represents a single-byte (8-bit) figure, and nnnn is a two-byte (16-bit) address.

CPU flags[edit | edit source]

The least significant bit is shifted into the Carry flag, SRE affects 2 of the CPU's status flags after the EOR:

  • The negative flag is set if the result is negative, i.e. has its most significant bit set.
  • The zero flag is set if the result is zero, or cleared if it is non-zero.

Examples[edit | edit source]

Fast Parity Check

SRE can be used in a simple trick to check the parity of a byte:

LDA addr
STA temp ; use a zeropage temp for speed and to not corrupt addr
SRE temp
SRE temp
SRE temp
SRE temp
SRE temp
SRE temp
SRE temp
AND #$01
; A=0 and flag Z=1 if even parity ; A=1 and flag Z=0 if odd parity

Links[edit | edit source]