From C64-Wiki
Jump to navigationJump to search

LSR (short for "Logic Shift Right") is the mnemonic for a machine language instruction which "shifts" the bits in either the accumulator or a specified address in RAM, one bit position towards the "right", or least significant, "end" of the byte. The bit previously held at the least significant position is "shifted out" of the byte, and into the carry flag, whereas the most significant bit, "left empty" by the shift operation, is "filled in" with a zero bit.

If the byte affected by the operation is taken as an unsigned 8-bit integer, the LSR operation effectively halves the number, leaving a result of seven bits in the accumulator, whereas carry will hold the "remainder" of the "division". Dividing signed integers by two in this way requires programming efforts to keep the sign bit from "wandering into" the other bits, causing erratic results.

It is interesting to note that whereas ADC and SBC do not come in "flavours" which do not take an incoming carry or borrow, both LSR and its counterpart, ASL, are complemented by the instructions ROL and ROR, which "fills the vacant bit" with what was in the carry flag prior to the operation. Historically, ASL and LSR was implemented in the very first 65xx CPUs, whereas ROL and ROR were only available in CPUs manufactured after a certain date.

The following example shows how to right-shift an integer spanning several bytes, or effectively dividing it by two:

LSR Num+n  Shift most significant byte
ROR Num+n-1Shift next-to-most-significant byte
ROR Num    Shift least significant byte

Addressing modes[edit | edit source]

Opcode Addressing
in bytes
Number of
Dec Hex
74 4A Accumulator LSR A 1 2
78 4E Absolute LSR nnnn 3 6
94 5E Absolute,X LSR nnnn,X 3 7
70 46 Zeropage LSR nn 2 5
86 56 Zeropage,X LSR nn,X 2 6

LSR supports the five addressing modes shown in the table at right. In the assembler formats listed, nn represents a single-byte (8-bit) figure, and nnnn is a two-byte (16-bit) address.

CPU flags[edit | edit source]

LSR affects 3 of the CPU's status flags:

  • The negative status flag is always unconditionally cleared.
  • The zero flag is cleared unless the operand is zero
  • The carry flag is copied from the least significant bit (bit 0) of the operand prior to shifting