Zeropage addressing is an addressing mode similar to absolute addressing, but limited in the sense that it can only refer to addresses within the zeropage, i.e. in the range 0 thru 255 (or $00 thru $FF in hexadecimal). The advantages to the zeropage addressing mode over absolute addressing are that a zeropage-addressed instruction takes up two bytes rather than the three required for instructions in absolute mode, and a zerobyte instruction takes one machine cycle less than its absolute-addressing equivalent to complete.
Of the 23 instructions that support absolute addressing mode, only JMP and JSR do not support zeropage addressing. The other 21 are: ADC, AND, ASL, BIT, CMP, CPX, CPY, DEC, EOR, INC, LDA, LDX, LDY, LSR, ORA, ROL, ROR, SBC, STA, STX, and STY.
In a disassembly listing from a machine language monitor, instructions in zeropage will have two hexadecimal digits in their argument, whereas those in absolute addressing mode have four digits in the argument. Furthermore, in the "raw" machine code (if displayed), the former will consist of two bytes of code, whereas the latter will take up three bytes. For example:
$C000 A5 FE LDA $FE This instruction is in zeropage addressing mode $C002 8D 20 D0 STA $D020 This one is in absolute addressing mode
Assembler will generally use zeropage addressing whereever this is avaiable, but it may be possible to "force" the use of absolute mode in "zeropage situations". Consult the documentation for your assembler for further details on this topic.