EOR (short for "Exclusive OR") is the mnemonic for a machine language instruction which performs a bit-wise boolean "Exclusive-or" between each of the eight bits in the accumulator and their corresponding bits in the memory address specified. The eight resulting bits form a byte, which is stored in the accumulator.
EOR supports eight different addressing modes, as shown in the table at right.
In the assembler formats listed, nn represents a single-byte (8-bit) figure, and nnnn is a two-byte (16-bit) address.
With some addressing forms (marked with an asterisk, *, in the "Number of cycles" column) the execution time for EOR depends on the circumstances: In cases where the indexing requires the CPU to "reach across" a page boundary from the base address, the execution time is 1 cycle longer than listed here.
- The negative flag is set if the result is negative, i.e. has its most significant bit set.
- The zero flag is set if the result is zero, or cleared if it is non-zero.
One's complement/NOT using EOR
Some CPU architectures supports a one's complement, a simple "not" (inverting all bits) by their instruction set with an separate implicit instruction. The 6502 family has to use the more general EOR with the proper argument to accomplish this:
to operate on the accumulator.
Detect if two bytes have opposite signs
EOR can be used in a simple trick to check if two bytes have opposite signs:
LDA addr1 EOR addr2 ; N flag is set if signs were opposite, else cleared ; use BPL or BMI here to branch
Correction for signed comparisons
SEC LDA Value1 ; take the difference (signed values) Value1 - Value2 SBC Value2 ; can't use CMP because it does not set the Overflow Flag BVC + ; skip if no overflow EOR #$80 ; the sign has to be inverted in case of an overflow + BPL IsPositive
Merge accumulator bits with memory
Merge the upper 4 bits (according to the mask from the AND instruction) from the accumulator with the lower 4 bit of location Value and store the result there.