BPL

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BPL (short for "Branch if PLus") is the mnemonic for a machine language instruction which branches, or "jumps", to the address specified if, and only if the negative flag is clear. If the negative flag is set when the CPU encounters a BPL instruction, the CPU will continue at the instruction following the BPL rather than taking the jump.

BPL in comparisons[edit]

Main article: Comparisons in machine language

BPL and it's "counterpart", BMI, are often used after a "compare" instruction (either CMP, CPX, or CPY) in conjunction with comparing signed 8-bit integers, like e.g.:

LDA NumA   Read the value "NumA"
CMP NumB   Compare against "NumB"
BPL Larger Go to label "Larger" if "NumA" >= "NumB"
...        Execution continues here if "NumA" < "NumB"

For signed integers, this method fails if either NumA or NumB (but not if both) exceeds 127/$7F; instead, BCC and BCS should be used for greater than/less than-style comparisons of signed bytes.

Addressing mode[edit]

Opcode Addressing
mode
Assembler
format
Length
in bytes
Number of
cycles
Dec Hex
16 10 Relative BPL nn 2 2*

BPL only supports the Relative addressing mode, as shown in the table at right. In the assembler formats listed, nn is a one-byte (8-bit) relative address. The relative address is treated as a signed byte; that is, it shifts program execution to a location within a number of bytes ranging from -128 to 127, relative to the address of the instruction following the branch instruction.
The execution time for BPL is not a fixed value, but depends on the circumstances. The listed time is valid only in cases where BPL does not take the branch. If it does take the branch, execution takes one additional clock cycle. Furthermore, if the branching crosses a page boundary, yet another cycle must be added to the execution time listed.

CPU flags[edit]

BPL does not affect any of the CPU's status flags.