ISC

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ISC (short for "Increase then Subtract with Carry") is a mnemonic for an illegal opcode machine language instruction.

This illegal opcode is a combination of two operations with the same addressing mode: INC, followed by SBC

Function: {addr} = {addr} + 1; then A = A - {addr}

Addressing modes[edit]

Opcode Addressing
mode
Assembler
format
Length
in bytes
Number of
cycles
Dec Hex
239 EF Absolute ISC nnnn 3 6
255 FF Absolute,X ISC nnnn,X 3 7
251 FB Absolute,Y ISC nnnn,Y 3 7
231 E7 Zeropage ISC nn 2 5
247 F7 Zeropage,X ISC nn,X 2 6
227 E3 Indexed-indirect ISC (nn,X) 2 8
243 F3 Indirect-indexed ISC (nn),Y 2 8

ISC supports the 7 different addressing modes shown in the table at right. In the assembler formats listed, nn represents a single-byte (8-bit) figure, and nnnn is a two-byte (16-bit) address.

CPU flags[edit]

ISC affects 4 of the CPU's status flags according to the SBC subtraction, after the increment:

  • The negative flag is set if the result is negative, i.e. has its most significant bit set.
  • The overflow flag is set if the operation results in an overflow.
  • The zero flag is set if the result is zero, or cleared if it is non-zero.
  • The carry flag is set or cleared depending on the result.

The SBC part of this instruction honors the decimal flag.[1]

Examples[edit]

Incrementing a loop counter

ISC can be used in a simple trick to increment a loop counter:

LDA #ENDVALUE
SEC
ISC counter    ; Increment counter, then use SBC to compare with A
BNE next

Links[edit]

References[edit]

  1. NMOS 6510 Unintended Opcodes (No More Secrets) (page 82): "This instruction works exactly like INC followed by SBC, with SBC inheriting the decimal mode."