ALR

ALR (short for "AND then Logical shift Right") is a mnemonic for an illegal opcode machine language instruction.

This illegal opcode is a combination of two operations using immediate addressing mode: AND, followed by LSR

Function: A = (A & #{imm}) / 2

Addressing mode

Opcode		Addressing mode	Assembler format	Length in bytes	Number of cycles
Dec	Hex
75	4B	Immediate	ALR #nn	2	2

ALR only supports the Immediate addressing mode, as shown in the table on the right.

CPU flags

ALR affects 3 of the CPU's status flags according to the state after the shift:

• The negative flag is always cleared.
• The zero flag is set if the result is zero, or cleared if it is non-zero.
• The carry flag has the value of accumulator's bit 0 if bit 0 of the mask is 1 or cleared otherwise.

Examples

Shift Right and Clear Carry

ALR #$FE

is equivalent to:

LSR
CLC

but takes 2 cycles instead of 4.

Links

• NMOS 6510 Unintended Opcodes (No More Secrets)