ARR

ARR is the mnemonic for the illegal opcode machine language instruction which ANDs the content of accumulator register with an immediate value and then RORs the result.

This illegal opcode is a combination of two operations with the same addressing mode: AND, ROR

Addressing modes

Opcode		Addressing mode	Assembler format	Length in bytes	Number of cycles
Dec	Hex
107	6B	Immediate	ARR #nn	2	2

RRA supports the 1 addressing mode shown in the table at right. In the assembler formats listed, nn represents a single-byte (8-bit) figure, and nnnn is a two-byte (16-bit) address.

CPU flags

RRA affects 3 of the CPU's status flags:

• The negative flag is set if the result is negative, i.e. has it's most significant bit set (not in decimal mode).
• The zero flag is set if the result is zero, or cleared if it is non-zero (not in decimal mode).
• The carry flag is set or cleared depending on the result.