Expansion Port

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The Expansion Port of the C64

The Expansion Port, often called also Module, Cartridge or Memory Expansion Port. This port is a rectangular opening at the back of the C64 case and is intended for expansions of the system. Basically it corresponds with the ISA or PCI ports on a PC. Since all important signals of the C64 are led to the connector, this results in a wide range of applications. From just connecting a simple reset button a modem and EPROM programming device up to a SuperCPU there are almost all imaginable expansions possible. The expansion port is mainly used for plugging in cartridges which contain application software, games or additional RAM.

In opposition to the user port there are no free programmable lines at the expansion port, i.e. expansion port modules need to "listen" permanently to the data and address bus of the CPU MOS 6510 and influence the system with a conform timing. Therefore the expansion port is not suitable for simple projects.

Pin assignment[edit]

The expansion port is a 2-row EDGE connector with 44 contacts in total. The pitch of the contacts is 2.54 mm (0.1 inch).

Pin assignment

Pin Signal Meaning Remark
1 GND Ground (0 Volt)
2 +5V DC Supply voltage +5V DC The maximum load for extensions is 450mA.
3 +5V DC Supply voltage +5V DC The maximum load for extensions is 450mA.
4 /IRQ Interrupt Request see IRQ
5 R-/W Read - /Write High-level during read cycle, Low-level during write cycle
6 DOT Clk Dot clock frequency 7,88 MHz at PAL-systems ; 8,18 MHz at NTSC-systems
7 /I/O1 Input/Output 1 Low-level, if address bus within $DE00-$DEFF.
8 /GAME Game configuration Used for memory re-configuration; see PLA (C64-Chip)
9 /EXROM External ROM Similar to /GAME. During low the internal RAM in the range of $8000-$9FFF will be switched off and /ROML will be set low, if one of these adresses occur.
10 /I/O2 Input/Output 2 Low-level, if address bus within $DF00-$DFFF.
11 /ROML ROM Low Gets low, if the address range $8000-$9FFF is switched off with /EXROM and one of these addresses occur on the bus.
12 BA Bus Available Signal from the video controller, which indicates that the bus data are valid. If BA=1 the VIC allocates the bus and no other unit can use it.
13 /DMA Direct Memory Access if /DMA=Low the CPU can be requested to release the bus. It will stop after the next read cycle and all bus lines will go to high resistance state. So other units can use the computer hardware. At /DMA=High the CPU continues to work.
14 D7 data line 7 data bus of the computer
15 D6 data line 6
16 D5 data line 5
17 D4 data line 4
18 D3 data line 3
19 D2 data line 2
20 D1 data line 1
21 D0 data line 0
22 GND Ground (0 Volt)
A GND Ground (0 Volt)
B /ROMH ROM High Depending on the status of /GAME and /EXROM this line gets low during access to the address space between $A000-$BFFF respectively $E000-$FFFF. Condition: the internal ram area is faded out.
C /RESET Reset If this line will be pulled to low, all chips will be re-initialized. The program counter of the CPU will be loaded with the reset vector $FFFC and $FFFD (normally $FCE2).
D /NMI Non Maskable Interrupt see NMI
E Ø2 Phi 2 system clock (0,98MHz at PAL, 1,02MHz at NTSC)
F A15 address line 15 address bus of the computer
H A14 address line 14
J A13 address line 13
K A12 address line 12
L A11 address line 11
M A10 address line 10
N A9 address line 9
P A8 address line 8
R A7 address line 7
S A6 address line 6
T A5 address line 5
U A4 address line 4
V A3 address line 3
W A2 address line 2
X A1 address line 1
Y A0 address line 0
Z GND Ground (0 Volt)